The purpose of these timing signals
is to activate different portions of the tone translator circuit at the
correct times. Here's a description of what each timing signal does:
| INCNT |
High during the time the input counter (up counter) is
allowed to run. (At present, the counter is allowed to run for 8 clock
pulses. Later on in the tone translator project, the size of this
counter will be increased, and it will be allowed to run much longer.) |
| LDSR |
Load the up counter's final number into the octave shift register. |
| OCTAVE |
Allow the shift register to shift one bit left or right
if OCTUP or OCTDN is high. (OCTUP stands for shift one octave up; OCTDN
stands for shift one octave down; later on, we'll add the capability to shift by multiple octaves.) |
| LDOUTCNT |
Load the shift register's number into the output counter. |
| OUTCNT |
High during the time the output counter is allowed to
run. (At present, the counter is allowed to run for 8 clock
pulses. Later on
in the tone translator project, the size of this counter will be
increased, and it will be allowed to run much longer.) |
| CYCLE_END |
Marks the end of the timing signal cycle. A new cycle then starts. |
For this experiment, add gates to the above incomplete schematic, so that the circuit will produce the waveforms shown.
Right click here and save the test vector file. (Don't choose open.)
Tips
- Two circles have been drawn on the waveforms shown above.
The left one illustrates the conditions needed to make ICNT go high,
and the right one illustrates the conditions needed to make LDSR go
high.
- Most of the AND gates in the schematic have circles on some
of their inputs. These circles are simply a compact way of drawing
inverters.
- The names of gates in Lever are as follows: 4AND means an
4-input AND gate with no inverted inputs, 4AND1 means a 4-input AND
gate with one input inverted, 4AND2 means a 4-input AND gate with two
inputs inverted, etc.
- LDSR is the easier of the two signals to understand. It
goes high only when Q3 is high and Q0, Q1, Q2, and Q4 are low. Thus, an
AND gate set up to detect this condition will work. Lever doesn't have
5-input AND gates, so we have to use a 4-input gate followed by a
2-input one--which acts just like a 5-input gate.
- Notice that INCNT first goes high when Q4 through Q0 is
00000 (i.e., Q4=0, Q3=0, Q2=0,Q1=0) (assuming that TS_CAI is high).
Also, the last point where INCNT is high is when Q4 through Q0 is 00111.
- What the above statements mean is that INCNT will go high
whenever TS_CAI is high, and both Q4 and Q3 are low. We don't
care what values Q2, Q1, and Q0 have.
- Thus, the 3-input AND gate only needs to check for TS_CAI
= 1, Q4 = 0, and Q3 = 0. It doesn't need to check the status of Q2
through Q0.
- To rotate the counter, select the Move tool (4-headed arrow) and click the counter. Then, go to the Edit menu and choose Rotate.
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